AGWB - Address Generator for WishBone
latest

Contents:

  • Overview
  • Installation and usage
  • XML description
  • VHDL
  • Python
AGWB - Address Generator for WishBone
  • »
  • Welcome to AGWB’s documentation!
  • Edit on GitHub

Welcome to AGWB’s documentation!

Contents:

  • Overview
    • Local bus
    • Allocation of adresses
    • Input
    • Output products
    • License
  • Installation and usage
    • AGWB and FuseSoc
  • XML description
    • Why XML?
    • Valid Elements
      • blackbox
      • block
      • constant
      • creg
      • field
      • include
      • sreg
      • subblock
      • sysdef
    • Math within attribute value
    • Notes
      • reps attribute
      • ignore attribute
      • variants
  • VHDL
    • Conversion functions
  • Python
    • Register interface
    • Example

Indices and tables

  • Index

  • Module Index

  • Search Page

Next

© Copyright 2020, Wojciech M. Zabolotny and contributors. Revision b433c8a1.

Built with Sphinx using a theme provided by Read the Docs.